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CMD SUPERCPU RAM EXPANSION & TIMING
=upe=r=iŒFsLJ SW RAM Expansion Card Prototype
Slated lor release in the next lew weeks is the RAM Expansion Card for the CMD SuperCPU 64. This card can contain from 1 to 16 Megabytes of RAM (using standard 72-pin SIMMs) that can be used by future applications. A GEOS driver is expected to ship with the card.
One of the more anticipated releases for the abperCPU isjust around the corner, I'm speaking oftheSuperRAM card for theSuperCPU 64, long awaited by many of the developers involved in creating new programs for IjjperCPl I-enhanced systems. The card will allow larger programs or programs with extensive data to be fully loaded into memory (as opposed to bringing in separate modules from disk, a process that is both slow and inconvenient). New programs, written with the SuperCPU and Super RAM card in mind, can offer more powerful features, lint before we get into technical details, let's take a more general look at the SuperRAM card itself.
Pictured on the right side of'this page is the prototype SuperRAM card which CMD has developed for testing. The board contain|*pnly a few components: a clock oscillator, bus driver, a reprogrammable array logic device (GAL), a digital delay chip, a complex programmable logic device (CPLD), and a handful ofresistors and capacitors. There are also two connectors on lite back of the circtiil board (not shown) which attach the SuperRAM card to the SuperCI'U main board, ani|a72-pin SIMM (Single Inline Memory Module) socket where the RAM SIMM is installed.
As with the SuperCPU itself, the SuperRAM card's complex circuitry is mostly inside the CPLD, which contains most of the memory mapping, control and refresh circuitry. While this vastly decreases the amount of board space required, developing the logic equations needed to program the chip for a specific function often proves to be very time-consuming.
SIMM Chart
The chart below indicates the size and organization of 72-pin SIMMs supported by the SuperRAM card lor the SuperCPU. All SIMMs must be Fast Page Mode type, 70ns or faster.
SIMM Capacity Row Size Row/Column Adr.
The SIMM sockel can be fitted with 72-pin memory modules containing from one to 16 Megabytes of standard Fast Page DRAM. It's very important to make sure thai the SIMM used is standard Fast Page; EDO and oilier 72-pin SIMM types are not compatible, and will not operate correctly. The memory must be rated at 70 ns or fasler (the lower ilie number, the faster the speed rating), but bear in mind that faster RAM doesn't translate into faster access (the DRAM con tro Her ha sfixed speeds for performing memory access).
For additional information on compatible SIMMs, see the SIMM Chart included with this article. The chart fully specifies all SIMMs approved for use with the SuperRAM card.
The General Memory Map
Since the 65816 processor can address up to
16 Megabytes of RAM; the SuperRAM memory is unlike previous RAM expanders {such as the Commodore 17xx series RF.U's) in that programs can actually execute directly from litis memory. It's also important to note that programs don't have lo use the 658 I (i's native mode to be able to access this extra RAM, although there are some advantages to doing so. The program SUPFRRAMFAKL, which accompanies this article, contains a subroutine that shows how extra memory can be accessed in 6502 emulation via "long" addressing modes. We'll discuss that more a liltle later, but we should first look at hqw the SuperRAM card fits into the SuperCPU memory scheme.
For a good overview, take a look at the "SuperCPU (i4/128 Common Memory Map". The areas in white (Hanks $00, S01 and $F8-FF)are the memory found in every SuperCPU, with or without memory expansion, Banks $00 and S01 are static RAM, while SF8-FF are used and reserved banks for the system ROM. This map is identical on both the 64 and 128 versions of lite SuperCPU, though the 128 version will have two additional banksof static RAM which will be swapped in at Banks $00 and S01 as needed.
Given the general map, there is room for expansion RAM at Banks $02 through $F7. To avoid the need to translate addresses on all expansion RAM, SIMM memory addressing actually begins at Bank $00, although any expansion RAM that occupies the same address area as Static RAM (lianks S00 and S01) or ROM (SF8-FF) isn't accessible. The SIMM RAM Banks $00 and $1)1 have been moved to Banks $F(i and $17. and reserved for future system use. This then means that any system with expansion RAM (any size) will have this extra RAM available for future OS capabilities, but it also means that the last Bank available for user programs will be Bank $F5 (on a system with Hi Megabytes of expansion RAM installed).
Detecting Expansion RAM
Naturally, one of the more important questions on programmer's minds is, "How do I detect RAM expansion, and how do I
know how much there is?" Okay, that's two questions, hut we've got answers for both.
First, any new SuperCPU sold after the new SuperRAM card becomes available will sport a new version of the SuperCPU ROM, Likewise, all SuperRAM upgrades sold to users with older SuperCPUs will include the new ROM. Thus, the first step in determining if RAM expansion is present will be to check the ROM version. This is accomplished by reading four bytes, beginning at $00E487(64 mode only!).
SuperCPU 64/128 Common Memory Map
Banks SF6-FF * ROM
Banks SF6-F7 - System RAM
Banks S02-SF5 16 MB Expansion RAM
Banks $02-$7F 8 MB Expansion RAM
Banks $02-$3F 4 MB Expansion RAM
Banks SO2-S0F 1 MB Expansion RAM
Bank 501 - PsuedoROM. RAM
These four bytes contain the version number string in PETASCI1. The version that will provide initial support for expansion RAM is " 1,40". Head these bytes and compare for this number, 1ft he version number is lower, there's no expansion; if it's the same or higher, there may be expanded memory, and you'll need to move 011 to the next step.
If you found a version that supports RAM expansion, read in four bytes beginning at $00D27C. These bytes contain the following information concerning RAM expansion:
JOOD27C first Available Page S00D27D Bank of First Available Page JO0D27E Last Available Page+1 SOOD27F Bank of Last Available Page+1
If there isn't any extra RAM installed, all four bytes will contain zeroes. The BASIC program SUPERRAMDETECT provides an example of checking these parameters and calculating the available expansion memory. Please note that these variables are only valid in Bank $00 while I/O is switched in; should you need to check for expansion RAM with I/O out, these values are available in the same locations of Bank S01.
If your application needs to use some portion of expansion RAM, it must also update the memory variables. This requires switching in the SuperCPU 11/W registers by storing any value at S00DO7E (decimal 53374). After you have modified the variables, turn the SuperCPU H/VV registers back off by storing any value to S00D07F (decimal 53375), Again, I/O must be enabled during any of these changes, or you'll need to change the variables directly in Bank $01.
It is very important that you pay attention to the expansion RAM variables, and that you don't make any assumptions with regard to RAM availability; some future system extensions or user programs may steal some of the RAM before your application is started. As a result, it would be wise to create your program code and/or data segments in a manner that allows them to berelocated.CMD is presently working toward standards and tools that will make writing and utilizing relocatable code less painful, but it will make the transition easier if 6502/658Hi programmers start getting familiar with the techniques now.
To assist you in testing routines that detect RAM expansion, we've included the program SUPERRAMFAKE with this article. You may use this program to trick your SuperCPU into believing that it has RAM expansion available, as well as the proper OS version required to support it.
Speed Considerations
As you may already know, Dynamic RAM (DRAM) isn't as fast as Static RAM (SRAM), but it is far less expensive and available in larger capacities. This explains why DRAM was chosen for expansion memory.
Taking the speed into consideration, CMP) employed special circuitry Into the SuperRAM card's DRAM controller to help the DRAM keep up. Understanding how this controller 'thinks' is the key to optimizing the speed of expansion RAM accesses on the SuperCPU.
DRAM, unlike SRAM, must he pre-charged before valid data can be read from a specific address. DRAM also requires periodic 'refresh' in order to maintain its contents. These are the factors that add time to accessing the memory. The memory cells themselves in Dynamic memories are organized into an array of rows
Expansion RAM Speed Characteristics at 20 MHz*
Sequential Read within Row1: 1 Cycle
Non-seq, Read within Column3: t Cycle
Non-seq. Read, new Column3 in Row1: 2 Cycles Read from new Row1: 3.5 Cycles
Write within Row1: 1 Cycle
Write in new Row1: 3 Cycles
Read during Refresh3; up to 8,5 Cycles
Write during Refresh-1: up to 8 Cycles
'Rows are 2K, 4K or 8K Bytes, depending on the
SIMM (see SIMM Chart).
'Columns are groups of four bytes each on supported 72-pin SIMMs (see SIMM Chart).
'Refresh occurs approximately every 10
microseconds.
*At 1 MHz all times are 1 cycle (synchronized to the computer's Phase 2 clock), refresh is hidden.
and columns. On memory modules such as the SIMMs used by the .SuperRAM card, these rows and columns arc combined in a way that allows all the bits in a byte or a word to be precharged and accessed as a group.
Myou look at the SIMM Chart in this article, you'll notice that we included the number of addressable bits for rows and columns, as well as the number of bytes within a specific row. Let's look at the 1 MB SIMM to understand how this information describes the SIMM.
There are 9 bits used to address rows, and another i) bits for columns. Since 2A9=512, we can deduce thai there are 512*512 array crosspoints. which gives us 262,144 unique addresses. Divide that by 1024(JK),andyou'll get 256... so there are 25GK addresses on this SIMM. Since each address has 32 bits of data (or on a parity SIMM), there are 4*256K. or one Megabyte (1,048,576 Bytes) of 8- or 9-bit memory locations.
Still with me? Okay, we can also deduce from the SIMM is thai each row contains 2 KR (S800bytes)ol'8-or 9-bit data, since there are 512 columns of 4 bytes each per row.
Now let's look at how t he SuperllAM memory controller handles things. Assume lor a moment that you have a routine situated at $020000, the first available expansion memory location. This location is the first byte in a row ($020000/ S800=S40 with no remainder), and also the first byte of the first column of that row (always the case at the start of any new row, though we can do the math S020000/S04=S8000 with 110 remainder). At lliis location you have the following code:
020002 8F 00 03 02 STA $020300
Let's assume you jump to this code from another Bank or row, and il begins executing.
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